​Please design a mini-project in VHDL for an FPGA

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​Please design a mini-project in VHDL for an FPGA

We are required to design just the simulation (not

implementation) of a senior level electrical engineering project using Xilinx Design Suite,

anything that would qualify as a “mini-project” using knowledge gained from electrical

engineering courses. (Digital systems design, communication systems design or comparisons,

circuit analysis/design, etc.)

This should include how the design was implemented, tools used to implement, any relevant

block diagrams/schematics, how the testing was performed, visual results from testing.

I need the codes too showing the system running

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